Don't waste your valuable time and resources. Let Dillon Engineering pave the way to realize your complex algorithms in FPGAs and ASICs.
Explore Our SolutionsNearly 20 years of experience delivering system and logic design solutions for the most demanding applications. We serve customers large and small across a wide range of markets, specializing in custom FPGA and ASIC based DSP algorithms for high-performance computing applications.
Our wide selection of FFT IP meets the needs of any application. The IP is well-suited for both FPGA and ASIC targets and can be quickly customized to satisfy any particular requirement. Experience unmatched performance with our world-leading FFT implementations.
Our internally-developed, state-of-the-art tool facilitates the design of parameterized IP Cores. Advanced high-level design, modeling and verification capabilities separate us from the competition in FPGA and ASIC development.
Dillon Engineering's FFT IP cores deliver unmatched performance for FPGA and ASIC implementations. Our proven solutions combine cutting-edge speed with flexible architecture, enabling you to accelerate your most demanding DSP applications.
World's fastest FFT IP cores with optimized throughput and minimal latency for real-time applications.
Parameterizable designs supporting multiple transform sizes, precisions, and architectures to match your requirements.
Extensively tested and proven in production applications across telecommunications, radar, and signal processing.
Optimized for Xilinx FPGAs, Intel FPGAs, and ASIC implementations with vendor-specific optimizations.
Comprehensive datasheets, user guides, and technical support to accelerate your development.
Standard interfaces and proven testbenches ensure smooth integration into your design flow.
High-performance pipelined FFT architecture optimized for maximum throughput. Ideal for streaming applications requiring continuous data processing.
Mixed radix FFT architecture balancing performance and resource utilization. Perfect for applications requiring flexibility and efficiency.
Revolutionary architecture supporting extremely large transform sizes beyond traditional FFT limits. Breakthrough technology for specialized applications.
IEEE-754 compliant floating point FFT cores providing maximum dynamic range and precision for demanding scientific applications.
Industry-leading clock speeds on modern FPGAs
32 Gigasample per second processing capability
Industry-leading clock speeds on ASICs
Bit-accurate mathematical verification
Optimized for Virtex, Kintex, and Artix families including UltraScale and UltraScale+ architectures.
Full support for Stratix, Arria, and Cyclone device families with vendor-specific optimizations.
Technology-independent cores ready for ASIC synthesis in your target process node.
Complete specifications and performance data for the FFT_MIXED IP Core.
Download PDF →Technical specifications for the revolutionary UltraLong FFT IP Core.
Download PDF →Architecture details and specifications for the high-performance PIPE_FFT core.
Download PDF →Comprehensive technical specification for all FFT/IFFT IP cores.
Download PDF →Performance benchmarks and features of our floating point FFT cores.
Download PDF →Interested in evaluating our FFT IP cores or getting a quote? Fill out the form below and our team will respond within 24 hours.
How-To documents to help you through everyday situations designing DSP logic for FPGAs and ASICs.
Read More…Folder with all the downloads including evaluation libraries and documentation.
Read More…Comprehensive overview of Dillon Engineering's capabilities, services, and expertise.
Read More…DE announces the availability for immediate delivery the Mixed Radix FFT IP Core for Xilinx FPGAs.
Read More…DE announces the availability for immediate delivery the UltraLong FFT IP Core for Xilinx FPGAs.
Read More…DE announces the availability for immediate delivery the FFT_PIPE IP Core for Xilinx FPGAs.
Read More…Dillon Engineering won a contract for and delivered an UltraLong FFT IP to Johns Hopkins University Applied Physics Laboratory.
Read More…DE has released for immediate download evaluation libraries for Aldec Riviera simulation of its Floating Point Library IP Core (FPLIC).
Read More…DE featured in Chip Design Magazine with an article titled "FPGAs, Go, Go, Go".
Read More…Dillon Engineering's development of the world's fastest FFT/IFFT IP Core success story.
Read More…Comprehensive overview of Dillon Engineering's capabilities and services.
Real-world implementation success with our FFT IP cores.
Latest FFT_PIPE IP Core release for Xilinx FPGAs.
Revolutionary UltraLong FFT IP Core for Xilinx FPGAs.
Discover the performance leader in FFT IP core technology.
High-performance floating point IP modules and evaluation tools.