DE Releases Mixed Radix FFT IP Cores for Xilinx FPGAs
Dillon Engineering today anounced the release of its Mixed Radix FFT IP Core for Xilinx FPGAs. This Mixed Radix FFT IP Core is a architecture specific version of its Mixed Radix FFT IP Core targeted to Xilinx FPGAs.
The Mixed Radix FFT IP Core for Xilinx FPGAs is available for immediate delivery complete with targeted netlist, test bench, support, and bit accurate model. A full RTL source version is also available.
Check out DE FFT IP to see all the FFT IP available from Dillon Engineering. There is FFT IP available to meet the needs of any application, FPGA or ASIC as well as fixed or floating point.
The Mixed Radix FFT IP Core for Xilinx FPGAs is available for immediate delivery complete with targeted netlist, test bench, support, and bit accurate model. A full RTL source version is also available.
Check out DE FFT IP to see all the FFT IP available from Dillon Engineering. There is FFT IP available to meet the needs of any application, FPGA or ASIC as well as fixed or floating point.
